High power devices such as IGBTs (insulated gate bipolar transistors), power MOSFETs (metal oxide semiconductor field effect transistors), power diodes, etc. are typically assembled by sawing (dicing) individual dies from a wafer and placing the individual dies in packages. Electrical connections are made to each packaged die by wire bonding, metal ribbons, metal clips, etc. It is advantageous for many power devices with a vertical current path between electrodes at opposing sides of the die to be made as thin as possible to reduce the on-state resistance (Rdson) of the device. However, conventional high power semiconductor packages are not designed for very thin dies, e.g. dies <50 μm thick. Dies that are less than 50 μm thick are highly susceptible to cracking during the sawing (dicing) and die attach processes due to the forces involved. As such, conventional semiconductor dies typically have a vertical current path much thicker than 50 μm. Dies of such thickness have higher Rdson and inefficient heat transfer due to the thick semiconductor limitation. In addition, most conventional packages provide only single-sided or double-sided cooling which lowers continuous heat dissipation for high power devices.